ICM'08 Keynote Speakers
Keynote 1
Power Management for VLSI: The History and The Outlook
Farid Najm, University of Toronto, Canada
With every new generation of semiconductor technology, design teams need to pay increased attention to the power dissipation of VLSI circuits. This trend, which started in the early 1990s, has become serious enough that managing power is now the primary design constraint for many design groups. Much work has been done in the EDA community on power estimation, modeling, and optimization, but the practical impact of low-level EDA solutions for power management has not been great. Instead, most practical techniques for power management are not EDA-driven, but are based on innovations in design technology. It is generally felt that EDA for power management can have a stronger impact at higher levels of abstraction, but this potential has not yet been realized. I will start by reviewing the basics of power dissipation in logic circuits, followed with some history of IC technology to show why power has become such a big problem. I will then describe the basics of low-level EDA power analysis and briefly cover some design techniques have emerged as practical solutions for power management. Finally, I will highlight the potential benefits and methods for high-level power modeling and estimation.
Biography
Farid N. Najm received the B.E. degree in electrical engineering from the American University of Beirut, Beirut, Lebanon, in 1983 and the Ph.D. degree in electrical and computer engineering (ECE) from the University of Illinois, Urbana (UIUC), in 1989. From 1989 to 1992, he was with Texas Instruments, Dallas. He was then with the ECE Department, UIUC, as an Assistant Professor and became an Associate Professor in 1997. Since 1999, he has been with the ECE Department, University of Toronto, Toronto, ON, Canada, where he is currently a Professor. His research includes computer-aided design (CAD) for very large scale integration (VLSI), with an emphasis on circuit-level issues related to power, timing, variability, and reliability. Dr. Najm received the IEEE TRANSACTIONS ON CAD Best Paper Award in 1992, the NSF Research Initiation Award in 1993, and the NSF CAREER Award in 1996. He was an Associate Editor for the IEEE TRANSACTIONS ON VLSI SYSTEMS from 1997 to 2002 and is currently an Associate Editor for the IEEE TRANSACTIONS ON CAD OF INTEGRATED CIRCUITS AND SYSTEMS. Farid Najm is a Fellow of the IEEE.
Keynote 2
Microprocessor Development: Retrospective and Future Challenges
Vojin G. Oklobdzija, University of Texas in Dallas, USA
A retrospective of modern microprocessor development is presented. It addresses advances in enabling technology that brought an unprecedented growth and a perspective for the future development. The features which enabled development of modern microprocessors and the guiding principles and contributions made by modern micro-processor architecture are discussed. The move into super-scalars is explained with respect to performance and implementation difficulties. Multi-billion transistor challenge and the impact of the computer entry into consumer market representing new potentials and new challenges are addressed.
Biography
Vojin G. Oklobdzija is IEEE Fellow, Distinguished Lecturer of the IEEE Solid-State Circuits Society and Member of the IEEE CAS Board of Governors. He received Dipl. Ing. degree from the School of Electrical Engineering, University of Belgrade in 1971, and Ph.D. from the University of California at Los Angeles in 1982. From 1982 to 1991 he was at the IBM Thomas J. Watson Research Center, where he made contributions to the development of RISC processors, super-scalar and supercomputer design. In the course of this work, he obtained several patents, the most notable one on register renaming, which enabled a new generation of modern computers. From 1988 to 1990 he was IBM visiting faculty member at the University of California at Berkeley, from 1991-2006 professor of computer engineering at the University of California Davis, 2006-2007 Chair Professor at Sydney University and currently Professor at the University of Texas in Dallas. Prof. Oklobdzija served as a consultant to: Sun Microsystems, Bell Laboratories, Texas Instruments, Hitachi, Fujitsu, SONY, Intel, Samsung and Siemens Corp. where he was a principal architect for the Infineon TriCore processor. He holds 14 U.S., 6 European, 6 Japanese, 6 international and 3 other patents pending. Prof. Oklobdzija served as associate editor for the IEEE Transaction on Circuits and Systems II, IEEE MICRO, and Journal of VLSI Signal Processing, Associate Editor of IEEE Transaction on Computers from 2000-2006, IEEE Transactions on VLSI from 1995-2003, the ISSCC program committee from 1996 to 2003 and again in 2007. International Symposium on Low-Power Design, Computer Arithmetic, PATMOS and numerous other conference committees. He is actively involved in IEEE as organizer, OEB Chair of Solid-State Circuits Society (1998-2002) and was a General Chair of the 13th Symposium on Computer Arithmetic (1997) and IASTED Conference on Circuits, Signals and Systems (2006). In 2008 he service included: Technical Program Chair for the International Symposium on Low-Power Design 2008, Track Chair for ICCD 2008 and General Chair for DCAS 2008. Prof. Oklobdzija has published more than 150 papers, 6 books and dozen of book chapters in the areas of circuits and technology, computer arithmetic and computer architecture. His book "Computer Engineering" won Outstanding Academic Title award, out of 22,000 titles considered and is currently in second edition. He has given over 150 invited talks and short courses in the USA, Europe, Latin America, Australia, China and Japan. As Emeritus Professor of the University of California he directs ACSEL laboratory which is involved in digital circuits optimization for low-power and ultra low-power, high-performance system design and sensor nodes. (for further information please see: http://www.acsel-lab.com)
Keynote 3
Integrated Circuit Brokers : Where do they come from? Where are they heading ?
Bernard Courtois, Circuits Multi-Projects(CMP), France
Infrastructure to provide access to custom integrated hardware manufacturing facilities are important because they allow Students and Researchers to access professional facilities at a reasonable cost, and they allow Companies to access small volume production, which is otherwise difficult to obtain directly from manufacturers. This talk discusses the most recent developments at CMP, as well as other services similar to CMP. These services helped the development of microelectronics for the EE&CS communities. Other communities might take advantage the same way, like the BioMed community. Examples of BioMed applications using CMOS and MEMS are given. The conclusion includes statements for the BioMed community as well as statements on where manufacturing infrastructures like CMP should go, considering technical developments towards More Moore, More than Moore, as well as statements related to globalization.
Biography
Bernard Courtois received the Engineer degree in 1973 from the Ecole Nationale Suprieure d'Informatique et Mathmatiques Appliques de Grenoble (Grenoble, France), and next the Docteur-Ingnieur and Docteur-s-Sciences degrees from the Institut National Polytechnique de Grenoble. He is Director of the Laboratory of Techniques of Informatics and Microelectronics for Computer Architecture (TIMA, Grenoble, France) where research includes CAD, architecture and testing of integrated circuits and systems. He is also Director of CMP Service that is servicing Universities and Companies from about 60 countries for ICs, MCMs and MEMS prototyping and small volume production. Dr. Courtois has authored over 400 papers in journals and international conferences, and 13 books. He has over 40 invited talks in international conferences to his credit. He is Chairman of the European Design and Automation Association, is on the Steering Committee of IEEE International Symposium in Quality Electronics Design (ISQED), President of Thermal Testing and Vice-President for Analog and Mixed Signal Testing for IEEE TTTC. Over the past 30 years, He has been General Chair or Program Chair of 22 International conferences and workshops, including EDAC-ETC-EUROASIC, Electron and Optical Beam Testing, EUROCHIP, Mixed-Signal Testing, Rapid System Prototyping, THERMINIC, Design, Test and Microfabrication of MEMS/MOEMS, POLYTRONIC and European Nano Systems. He has also acted as a TPC member for over 65 conferences, notably IEEE NANO, IEEE GLSVLSI, ACM/IEEE DATE, IEEE ISQED, ACM/IEEE ICCAD, IEEE ICCD, ACM/IEEE DAC, and has been the European representative to numerous ACM/IEEE conferences Dr. Courtois is the Editor in Chief of Microelectronics Journal and Editor in Chief of the Journal of VLSI Design. He acted as an Associate Editor for the IEEE Transactions on VLSI Systems, IEEE Transactions on Components and Packaging Technologies, IEEE Design and Test of Computers journal, ASME Journal of Electronic Packaging. He is a member of STMicroelectronics Technology Council and a member of MEMSCAP Technology Advisory Board. Dr. Courtois received the IEEE Meritorious service award, an Honorary Doctorate from the Technical University of Budapest, and the IEEE Computer Society's Golden Core Member.